Linux Kernel
Microprocessors
operate on binary data; that is data composed of ones and zeros.
The
processor's execution is governed by an external clock. This clock, the system
clock, generates regular clock pulses to the processor and, at each clock
pulse, the processor does some work. For example, a processor could execute an
instruction every clock pulse. A processor's speed is described in terms of the
rate of the system clock ticks. A 100 MHz processor will receive 100,000,000
clock ticks every second. It is misleading to describe the power of a CPU by
its clock rate as different processors perform different amounts of work per
clock tick. However, all things being equal, a faster clock speed means a more
powerful processor. The instructions executed by the processor are very simple;
for example ``read the contents of memory at location X into register Y''. Registers are the microprocessor's internal storage, used for
storing data and performing operations on it. The operations performed may
cause the processor to stop what it is doing and jump to another instruction
somewhere else in memory. These tiny building blocks give the modern
microprocessor almost limitless power as it can execute millions or even
billions of instructions a second.
The instructions have to be fetched from memory
as they are executed. Instructions may themselves reference data within memory
and that data must be fetched from memory and saved there when appropriate.The size, number and type of register within a microprocessor is entirely dependent on its type. An Intel 4086 processor has a different register set to an Alpha AXP processor; for a start, the Intel's are 32 bits wide and the Alpha AXP's are 64 bits wide. In general, though, any given processor will have a number of general purpose registers and a smaller number of dedicated registers. Most processors have the following special purpose, dedicated, registers:
Program Counter (PC)
This register contains the address of the next
instruction to be executed. The contents of the PC are automatically
incremented each time an instruction is fetched,
Stack Pointer (SP)
Processors have to have access to large amounts of
external read/write random access memory (RAM) which facilitates temporary
storage of data. The stack is a way of easily saving and restoring temporary
values in external memory. Usually, processors have special instructions which
allow you to push values onto the stack and to pop them off again later. The
stack works on a last in first out (LIFO) basis. In other words, if you push
two values, x and y, onto a stack and then pop a value off of the stack then you
will get back the value of y.
Some
processor's stacks grow upwards towards the top of memory whilst others grow
downwards towards the bottom, or base, of memory. Some processor's support both
types, for example ARM.
Processor Status (PS)
Instructions may yield results; for example ``is the
content of register X greater than the content of register Y?'' will yield true
or false as a result. The PS register holds this and other information about
the current state of the processor. For example, most processors have at least
two modes of operation, kernel (or supervisor) and user. The PS register would
hold information identifying the current mode
Memory
All systems
have a memory hierarchy with memory at different speeds and sizes at different
points in the hierarchy. The fastest memory is known as cache memory and is
what it sounds like - memory that is used to temporarily hold, or cache,
contents of the main memory. This sort of memory is very fast but expensive,
therefore most processors have a small amount of on-chip cache memory and more
system based (on-board) cache memory. Some processors have one cache to contain
both instructions and data, but others have two, one for instructions and the
other for data. The Alpha AXP processor has two internal memory caches; one for
data (the D-Cache) and one for instructions (the I-Cache). The external cache
(or B-Cache) mixes the two together. Finally there is the main memory which
relative to the external cache memory is very slow. Relative to the on-CPU
cache, main memory is positively crawling.
The cache and main memories must be kept in
step (coherent). In other words, if a word of main memory is held in one or
more locations in cache, then the system must make sure that the contents of
cache and memory are the same. The job of cache coherency is done partially by
the hardware and partially by the operating system. This is also true for a
number of major system tasks where the hardware and software must cooperate
closely to achieve their aims.
Buses
The individual
components of the system board are interconnected by multiple connection
systems known as buses. The system bus is divided into
three logical functions; the address bus, the data bus and the control bus. The
address bus specifies the memory locations (addresses) for the data transfers.
The data bus holds the data transfered. The data bus is bidirectional; it
allows data to be read into the CPU and written from the CPU. The control bus
contains various lines used to route timing and control signals throughout the
system. Many flavours of bus exist, for example ISA and PCI buses are
popular ways of connecting peripherals to the system.
Controllers and Peripherals
Peripherals
are real devices, such as graphics cards or disks controlled by controller
chips on the system board or on cards plugged into it. The IDE disks are
controlled by the IDE controller chip and the SCSI disks by the SCSI disk
controller chips and so on. These controllers are connected to the CPU and to
each other by a variety of buses. Most systems built now use PCI and ISA buses
to connect together the main system components. The controllers are processors
like the CPU itself, they can be viewed as intelligent helpers to the CPU. The
CPU is in overall control of the system.
All controllers are different, but
they usually have registers which control them. Software running on the CPU
must be able to read and write those controlling registers. One register might
contain status describing an error. Another might be used for control purposes;
changing the mode of the controller. Each controller on a bus can be
individually addressed by the CPU, this is so that the software device driver
can write to its registers and thus control it.
The IDE ribbon is a good example, as it gives you the ability to access each
drive on the bus separately. Another good example is the PCI bus which allows
each device (for example a graphics card) to be accessed independently.
Address Spaces
The
system bus connects the CPU with the main memory and is separate from the buses
connecting the CPU with the system's hardware peripherals. Collectively the
memory space that the hardware peripherals exist in is known as I/O space. I/O space may itself be further
subdivided, but we will not worry too much about that for the moment. The CPU can access both the system space memory and the I/O
space memory, whereas the controllers themselves can only access system memory
indirectly and then only with the help of the CPU.
From the point of view of the device, says the floppy disk controller, it will
see only the address space that its control registers are in (ISA), and not the
system memory. Typically a CPU will have separate instructions for accessing
the memory and I/O space. For example, there might be an instruction that means
``read a byte from I/O address 0x3f0 into register X''. This
is exactly how the CPU controls the system's hardware peripherals, by reading
and writing to their registers in I/O space. Where in I/O space the common
peripherals (IDE controller, serial port, floppy disk controller and so on)
have their registers has been set by convention over the years as the PC
architecture has developed. The I/O space address 0x3f0 just
happens to be the address of one of the serial port's (COM1) control registers.
There are times when controllers need to read
or write large amounts of data directly to or from system memory. For example when
user data is being written to the hard disk. In this case, Direct Memory Access (DMA) controllers are used to allow
hardware peripherals to directly access system memory but this access is under
strict control and supervision of the CPU.
Timers
All
operating systems need to know the time and so the modern PC includes a special
peripheral called the Real Time Clock (RTC). This provides two things: a
reliable time of day and an accurate timing interval. The RTC has its own
battery so that it continues to run even when the PC is not powered on, this is
how your PC always ``knows'' the correct date and time. The interval timer allows
the operating system to accurately schedule essential work.
